Department of Information & Communication Systems Engineering
University of the Aegean
SCHOOL OF ENGINEERING

Department of Information
& Communication Systems Engineering

Information & Communication Systems Security
Information Systems
Artificial Intelligence
Computer & Communication Systems
Geometry, Dynamical Systems & Cosmology
 
Αρχιτεκτονική Υπολογιστών

Title: Αρχιτεκτονική Υπολογιστών
Lesson Code: 321-3354
Semester: 3
ECTS: 5
Theory Hours: 3
Lab Hours: 2
Faculty: Goumopoulos Christos
 
External Website
http://www.icsd.aegean.gr/nkonofao/Αρχιτεκτονική%20Υπολογιστών%20Ι.htm
 
Content outline
Historical data on the evolution of computers. Architecture Von Neumann. Main memory. Auxiliary memory. Cache (Cache memory). Virtual Memory (Virtual Memory). I / O modules. Evaluation of Computer. Forms of representation of numerical data (both fixed and floating point). Structure and characteristics of the instruction set that supports the CPU. Machine language commands. Types of machine language commands. Types and data size. Simple computers (RISC) and complex instruction set (CISC). Support high-level programming languages. Organization and operation of the Central Processing Unit (CPU). Parallel processing. Multi-processor systems (MIMD, SIMD). Implementation of arithmetic. Channels. Technologies and methodologies for design of computer memory. Behavior management and multi-level memory hierarchy. Virtual Memory. Addressing modes for data management and from memory. Ways of addressing memory. Memory technology. Semiconductor memories. Static direct access memories, dynamic random access memory directly. Semiconductor memories accessible by content (Content Addressable Memories, CAM). Magnetic Memories. Memories of magnetic disks. Memories of magnetic tape. Optical Memories.
 
Learning outcomes
The student that will complete successfully the course is expected that will be in position to: - Cite the basic components of computer architecture and explains the organization of a typical computer. - Cite the principles of low-level programming. - Explain the purpose of the CPU, the I/O subsystems and the various forms of storage. - Comprehend the instruction set architecture of a machine, its design and implementation. - Explain the representation of integer and real numbers. - Cite the basic addressing modes of main memory. - Categorize the computers based on their instruction set. - Comprehend the support provided by the architecture to high-level programming languages. - Distinguish the basic differences between RISC and CISC systems. - Explain the operation of datapath - Explain the operation of control unit - Recognize the relation between hardware and software and the relation between low-level and high-level programming. - Explain the concept of pipelining - Examine the control unit implementation in the form of a sequential circuit - Examine the control unit implementation in the form of microprogramming. - Use the SPIM simulator of MIPS processor for programming at the machine level. - Evaluate the performance of a computer system. - Identify, assess and evaluate relative information via the proposed bibliographic sources and the use of Internet.
 
Prerequisites
Not required.
 
Basic Textbooks
1. Δημήτριος Β. Νικολός. Αρχιτεκτονική Υπολογιστών.3η εκδ./2017, ISBN: 978-960-93-4168-4. 2. Hennessy John L., Patterson David A. Αρχιτεκτονική Υπολογιστών. 4η Έκδοση/2011, ΕΚΔΟΣΕΙΣ Α. ΤΖΙΟΛΑ & ΥΙΟΙ Α.Ε., ISBN: 978-960-418-326-5. 3. Stallings William. Οργάνωση και Αρχιτεκτονική Υπολογιστών. 8η Έκδοση/2011, ΕΚΔΟΣΕΙΣ Α. ΤΖΙΟΛΑ & ΥΙΟΙ Α.Ε., ISBN: 978-960-418-328-9. 4. ANDREW S. TANENBAUM. Η ΑΡΧΙΤΕΚΤΟΝΙΚΗ ΤΩΝ ΥΠΟΛΟΓΙΣΤΩΝ: ΜΙΑ ΔΟΜΗΜΕΝΗ ΠΡΟΣΕΓΓΙΣΗ. 4η Εκδοση/2000, ΕΚΔΟΣΕΙΣ ΚΛΕΙΔΑΡΙΘΜΟΣ ΕΠΕ, ISBN: 960-209-403-6.
 
Additional References
IEEE Transactions on Computers Journal of Systems and Software
 
Learning Activities and Teaching Methods
Final examination and lab exercises (theoretical and programming). The mark of laboratory should be ≥ 5 for attendance in the final examinations. The mark of final examination should be ≥ 5 for successful course completion. The final mark is computed as follows: 0.3 * (Mark of Exercises) + 0.7 * (Mark of Examination). For each examination/exercises subject clearly specified evaluation criteria are given. The students can see their exam paper after the final examination and inspect their faults. The overall distribution of marks is announced on eClass, so that students can evaluate their performance.
 
Assessment/Grading Methods
Activity Semester workload Lectures 39 hrs laboratory practice 20 hrs Personal studying 62 hrs Mid-term 1 hr Final exam 3 hrs Course total 125 ώρες (5 ECTS)
 
Language of Instruction
Greek, English (for Erasmus students)
 
Μode of delivery
face-to-face


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